1. Field of the Invention
The present invention relates to a technique for manufacturing a semiconductor device comprising a Cu film, particularly to a method of manufacturing a semiconductor device comprising a Cu film buried in an insulating film together with a barrier metal film.
2. Description of the Related Art
Usually in a case where a wiring is provided inside the semiconductor device, a barrier metal film is provided around a wiring in order to prevent the wiring from being easily deteriorated. This technique is described, for example, in Jpn. Pat. Appln. KOKAI Publication No. 8-17920 or 2001-244265. A general method of forming a Cu wiring will be briefly described hereinafter.
First, a groove for the wiring is formed in an interlayer insulating film of a layer in which a Cu wire is provided. When the Cu wire is connected to conductive layers provided below, such as a wiring layer and a diffusion layer, a hole for a connection plug is made in such a manner as to communicate with the groove for the wiring. For example, the groove for the wiring and the hole for the connection plug are integrally formed through the interlayer insulating film, and the surface of the conductive layer is exposed. Next, the inner wall surfaces of the wiring groove and the connection plug hole, and the surface of the conductive layer are coated with a barrier metal film by a PVD process. Next, a seed Cu layer is provided on the barrier metal film to constitute an underlayer in providing a Cu film (Cu layer) which is a main portion of the Cu wire. Subsequently, a Cu film is grown on this seed Cu film by a Cu plating technique to fill in the wiring groove and the connection plug hole. Next, the barrier metal film and the Cu film on the interlayer insulating film are polished and removed by a CMP process, and a desired buried wire (damascene wire) is formed of Cu. To form an upper-layer wire further on the Cu wire, after providing the interlayer insulating film over the Cu wire, a desired upper-layer wire is formed on the interlayer insulating film by a method similar to the above-described method.
In general, the seed Cu film is formed at low temperature of 25° C. (room temperature) or less in order to prevent Cu from aggregating. Moreover, the Cu film on the seed Cu film is plated/grown at room temperature. Additionally, the Cu film (Cu wire, Cu plug) formed at low temperature in this manner has low reliability (resistance) with respect to defects such as stress migration and electro migration, because crystal grains are small. Therefore, to enhance the reliability of the Cu wire (Cu plug) with respect to the defects, usually an annealing treatment is performed at high temperature of 100° C. or more after a Cu plating treatment. Accordingly, crystal grain growth of the Cu film is promoted, and the reliability of the Cu wire is enhanced.
As described above, the annealing treatment after the Cu plating treatment is performed at high temperature of 100° C. or more. To provide the upper-layer wire on the Cu wire, the interlayer insulating film for the upper-layer wire is also formed generally at high temperature of 350° C. or more. When the Cu wire has low adhesion to the barrier metal film, and the Cu wire is brought under environment at high temperature, Cu atoms and vacancies in the Cu wire move along an interface between the barrier metal film and the seed Cu film. When a lower-layer wire connected to the Cu wire is a Cu wire, and the barrier metal film provided around a Cu via plug has low adhesion to the lower-layer Cu wire, similar phenomenon occurs in the interface between the barrier metal film and the lower-layer Cu wire. As a result, voids are formed in the Cu wire or the lower-layer Cu wire, and reliabilities, qualities, and electric characteristics of the respective Cu wires drop. Additionally, the reliability, quality, performance, yield and the like of the semiconductor device drop.
Moreover, since the seed Cu film is formed while cooling a substrate at low temperature which is not more than room temperature as described above, surface diffusion phenomenon cannot be utilized in forming the seed Cu film. Therefore, coverage inside the connection plug hole by the seed Cu film drops, or an overhang portion by the seed Cu film largely grows in an opening of the wiring groove. These are obstacles in plating/growing the Cu film to fill in the connection plug hole and the wiring groove after forming the seed Cu film. To inhibit the drop of the coverage or the growth of the overhang portion, a technique using a CVD or ALD film as the barrier metal film is tried. However, since the CVD or ALD film has low adhesion to the seed Cu film, the voids are easily generated in the Cu wire in a process (heating process) of forming the Cu wire. The CVD or ALD film is sensitive to type or state of the insulating film which is an underlayer. That is, it is difficult to directly and stably form the CVD or ALD film on the insulating film. Therefore, when the CVD or ALD film is used alone in the barrier metal film, there is a high possibility that the reliability or the quality of the Cu wire remarkably drops.
Furthermore, to inhibit the phenomenon in which the Cu atoms and vacancies in the Cu wire move along the interface between the barrier metal film and the seed Cu film, for example, a technique using Ti as a raw material of the barrier metal film is also known. However, if the Cu wire and the Ti barrier metal film are annealed at temperature of 450° C. or more, diffused amount of Ti in the Cu wire remarkably increases. Then, resistance of the Cu wire accordingly increases, and a problem that a resistance value is not up to standard occurs.